Quality of the Azores destination in the perspective of tourists

Tourism is a growing industry in the Autonomous Region of the Azores. However, little is known about how tourists evaluate this destination, something which certainly constitutes a shortcoming if one takes into consideration that this is a very competitive industry, with new destinations appearing every year and others increasing their market share. This paper focuses on the quality of the Azores destination in the perspective of tourists and, to an extent, has the goal of contributing to reduce this shortcoming. According to our findings, 74% of the tourists interviewed consider the global quality of the Azores destination to be very good or excellent, with the landscape, the climate/weather, the hospitality, the cleanliness and the security being the most highly-rated partial indicators. Additionally, a regression analysis indicates that the evaluation of the global quality of this destination varies according to the individual characteristics of tourists.N/

Estimation of WCET using a little language to describe microcontrollers and DSPs architectures

A method for analysing and predicting the timing properties of a program fragment will be described. First a little language implemented to describe a processor’s architecture is presented followed by the presentation of a new static WCET estimation method. The timing analysis starts by compiling a processor’s architecture program followed by the disassembling of the program fragment. After sectioning the assembler program into basic blocks call graphs are generated and these data are later used to evaluate the pipeline hazards and cache miss that penalize the real-time performance. Some experimental results of using the developed tool to predict the WCET of code segments using some Intel microcontroller are presented. Finally, some conclusions and future work are presented

An automatic programming tool for heterogeneous

Recent advances in network technology and the higher levels of circuit integration due to VLSI have led to widespread interest in the use of multiprocessor systems in solving many practical problems. As the hardware continues to diminish in size and cost, new possibilities are being created for systems that are heterogeneous by design. Parallel multiprocessor architectures are now feasible and provide a valid solution to the throughput rates demands of the increasing sophistication of control and/or instrumentation systems. Increasing the number of processors and the complexity of the problems to be solved makes programming multiprocessor systems more difficult and error-prone. This paper describes some parts already implemented (mainly the scheduler) of a software development tool for heterogeneous multiprocessor system that will perform automatically: code generation, execution time estimation, scheduling and handles the communication primitive insertion

A scheduling framework for heterogenous multiprocessor architectures based on industrial processors (DSP and microcontrollers)

Current VLSI and networking technology, the increase in computational power, and the rapid decrease in computational cost, enable the interconnection of VLSI processors, which can be arranged on a functional decomposition of the computational task to exploit the potential of multiprocessing. The use of multiprocessor systems in such way, provides a novel and cost effective solution in solving many practical problems in signal processing, control systems, instrumentation systems and robotics. In this article we present a framework that addresses the specificities of industrial processors, such as DSPs and microcontrollers and can easily be used to implement a huge range of scheduling algorithms

A machine independente wCET predictor for microcontrollers and DSPs

This paper describes a method for analyzing and predicting the timing properties of a program fragment. The paper first presents a little language implemented to describe a processor’s architecture and a static WCET estimation method is then presented. The timing analysis starts by compiling a processor’s architecture program followed by the disassembling of the program fragment. The assembler program is then decomposed into basic blocks and a call graph is generated. These data are later used to evaluate the pipeline hazards and cache miss that penalize the real-time performance. Finally, some experimental results of using the developed tool to predict the WCET of code segments with some Intel microcontroller are presented. execution, the desired time will be found by averaging. Even with this approach, if you want an accurate measurement, a number of complications such as, compiler optimizations, operating system distortions, must be solved. Nevertheless, these approaches are unrealistic since they ignore the system interferences and the effects of cache and pipeline, two very important features of some processors that can be used in our hardware architecture. Shaw [1], Puschner [2], and Mok [3], developed some very elaborated methodology for WCET estimation, but none of them takes into account the effects of cache an

Digital filtering in smart load cells

This paper describes an application of a Self Adaptive Pseudo-Moving Average Filter used in the implementation of a Smart Load Cell, to combine a stable digital output with a fast response to weight changes. The Smart Load Cell is a data acquisition solution using a single chip RISC microcontroller with very few other active and passive components around and taking advantage of the ratiometric functioning of load cell. The use of Smart Load Cells with digital outputs needs a cost effective in digital filtering of the final converter results for each Smart Load Cell. The technique is established by theoretical analysis and is justified by means of simulation and experimental results. The paper also describes an example of software calibration of a Multi-Load-Cells weighbridge, using four smart load cells.CEL-Cachapuz Electrónica Lda

Células de carga inteligentes

Este artigo descreve a implementaçãoo de uma arquitectura de procesamento de sinal das células de carga, muito simples, bastante eficaz e de baixo custo, desenvolvida em torno de um microcontrolador RISC e tirando partido da característica ratiomérica da saída das células de carga. Para amplificaçãoo e filtragem dos sinais aplicaram-se as técnicas de condensadores comutados. A necessidade de estabilidde térmica dos circuitos e componentes é minimizada devido ao uso da mesma cadeia de amplificação para o sinal e referência em conjunto com o software de calibração. A conversão analógico-digital é feita através do método de rampa simples, sendo controlado pelo microcontrolador que realiza todo o processamento digital necessário, bem como a comunicação série com o exterior. Também é descrito um exemplo de software de calibração duma plataforma de pesagem com várias células de craga "inteligentes"

Successive interference cancellation in vehicular networks to relieve the negative impact of the hidden node problem

Tese de mestrado integrado. Engenharia Electrotécnica e de Computadores (Telecomunicações). Universidade do Porto. Faculdade de Engenharia. 201

Implementação do Lean Manufacturing na industria metalomecânica

Tese de mestrado integrado. Engenharia Mecânica. Faculdade de Engenharia. Universidade do Porto. 201

Multi-channel approaches for musical audio content analysis

The goal of this research project is to undertake a critical evaluation of signal representations for musical audio content analysis. In particular it will contrast three different means for undertaking the analysis of micro-rhythmic content in Afro-Latin American music, namely through the use of: i) stereo or mono mixed recordings; ii) separated sources obtained via state of the art musical audio source separation techniques; and iii) the use of perfectly separated multi-track stems. In total the project comprises the following four objectives: i) To compile a dataset of mixed and multi-channel recordings of the Brazilian Maracatu musicians; ii) To conceive methods for rhythmical micro-variations analysis and pattern recognition; iii) To explore diverse music source separation approaches that preserve micro-rhythmic content; iv) To evaluate the performance of several automatic onset estimation approaches; and v) To compare the rhythmic analysis obtained from the original multi-channel sources versus the separated ones to evaluate separation quality regarding microtiming identification